M66222FP |
RFQ for M66222FP Required Field |
 |
| Product | Manufacturers | Pack | D/C |
| M66222FP | - | SSOP42 | 03+ |
The M66222 is a mail box that incorporates two complete CMOS shared memory cells of 128×8-bit configuration using highperformance silicon gate CMOS process technology, and are equipped with two access ports of A and B.
Access ports A and B are equipped with independent addresses CS , WE and OE control pins and I/O pins to allow independent and asynchronous read/write operations individually. This product exclusively performs a write operation from A port and a read operation from B port for one memory, and a read operation from A port and a write operation from B port for the other memory.
Typical Application |
Features |
| Inter-MCU data transfer memory, communication buffer memory | • Memory configuration of 128 × 8 bits × 2 memory areas• High-speed access, address access time 40ns (typ.)• Complete asynchronous accessibility from ports A and B• Fixed read/write access ports for memory• Completely static operation• Low power dissipation CMOS design• 5V single power supply• TTL direct-coupled I/O• 3-state output for I/O pins |
|
Symbol |
Parameter |
Conditions |
Rating |
Unit |
| Vcc | Supply voltage |
When defining GND pin as a reference. |
-0.3to+7.0 |
V |
| VI | Input voltage |
0.3 toVcc+0.3 |
V | |
| Vo | Output voltage |
0 toVcc |
V | |
| Pd | Maximum power dissipation | Ta=25 °C |
700 |
mW |
| Tstg | Storage temperature |
-65 to +150 |
°C |
